Updated Stack Delivers Higher ISP Performance, Support for LPDDR4 DRAM, and Expanded Hardware Support for Popular Vision and High Speed Data Interfaces
Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced updates to its award-winning Lattice mVision™ solution stack. The mVision stack now supports 4K video data processing and LPDDR4 memory to deliver higher quality image signal processing (ISP) performance. This allows developers to quickly implement popular high-speed communication and display interfaces to accelerate embedded vision performance with class-leading low power consumption for Edge applications including Machine Vision, Robotics, ADAS, Video Surveillance, and Drones.
Industry analyst Bob O’Donnell with TECHnalysis Research noted, “LPDDR4 memory provides device designers with a great range of different capacities/densities, speeds, and power requirements that can be matched to specific applications. Because of its low power nature, LPDDR4 memory is particularly well-suited for embedded and machine vision in battery-powered devices or other applications where thermal management is a challenge.”
“Embedded and Machine Vision applications enable compelling new user experiences across Industrial, Automotive, and Consumer markets. But supporting vision applications at the Edge requires developers to achieve a delicate balance between providing the processing performance these applications require while fitting within the design’s power consumption and physical footprint constraints,” said Mark Hoopes, Director of Industrial and Automotive Segment Marketing, Lattice Semiconductor. “Our mVision stack simplifies and accelerates embedded vision solution development, and our latest release leverages the class-leading features of Lattice Nexus FPGAs to support high performance interfaces and faster processing at low power.”
Highlights of the Lattice mVision solution stack version 2.1 include:
- Expanded support capabilities – the stack’s expanded capabilities include support for the LPDDR4 DRAM memory standard. With up to eight programmable SERDES lanes capable of speeds up to 10.3 Gbps, Lattice Nexus™ platform devices deliver the highest system bandwidth in their class to enable popular communication and display interfaces like 10 Gigabit Ethernet, PCI Express, SLVS-EC, CoaXPress, and HBR3 DisplayPort (at up to 8.1 Gbps per lane).
New signal bridging and duplication reference designs – the latest reference designs help developers convert legacy video standards commonly used in Industrial applications to the more widely-used MIPI standard. The new reference designs include:
- MIPI to parallel conversion
- Parallel to MIPI conversion
- MIPI CSI-2 to LVDS conversion
- 1-to-N MIPI duplicator
New ISP solutions
- New Lattice ISP support for Lattice Nexus FPGAs
- New ISP support from Lattice partner Helion enables high resolution, high frame rate UHD cameras
Lattice will exhibit mVision version 2.1 and Lattice Nexus FPGAs in the Macnica ATD Europe booth (Hall 8 D30) at VISION, the world’s leading trade fair for machine vision, taking place October 5-7 in Stuttgart, Germany. Lattice will also present an overview of the mVision stack and its latest updates in two live presentations at the show.
- Tuesday, Oct. 5 at 1:30 p.m. CEST in Kongress West (room W1)
- Wednesday, Oct. 6 at 10:30 a.m. CEST in Kongress West (room W1)
For more information about the Lattice technologies mentioned above, please visit:
About Lattice Semiconductor
Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing Communications, Computing, Industrial, Automotive, and Consumer markets. Our technology, long-standing relationships, and commitment to world-class support let our customers quickly and easily unleash their innovation to create a smart, secure, and connected world.
Lattice Semiconductor Corporation, Lattice Semiconductor (& design), and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. The use of the word “partner” does not imply a legal partnership between Lattice and any other entity.
GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.